1. Introduction
This invention relates to a process for electroplating substrates having metallic and non-metallic regions. More particularly, this invention relates to a step of metal plating during printed circuit board manufacture where one or more copper clad non-conducting substrates is provided with openings for electrical connections and coated with a carbonaceous conductive coating which is subsequently removed from those portions of the substrate where plating is undesired. More particularly, this invention relates to an improved means for electroplating using carbonaceous coatings with improved means for removal of the carbonaceous coating from surfaces where plating is undesired.
2. Description of the Prior Art
Nonconducting surfaces are conventionally metallized by a sequence of steps comprising catalysis of the surface of the nonconductor to render the same catalytic to electroless metal deposition followed by contact of the catalyzed surface with an electroless plating solution that deposits metal over the catalyzed surface in the absence of an external source of electricity. Metal plating continues for a time sufficient to form a metal deposit of desired thickness. Following electroless metal deposition, the electroless metal deposit is optionally enhanced by electrodeposition of metal over the electroless metal coating to a desired thickness. Electrolytic deposition is possible because the electroless metal deposit serves as a conductive coating that permits electroplating.
Catalyst compositions useful for electroless metal plating are known in the art and disclosed in numerous publications including U.S. Pat. No. 3,011,920, incorporated herein by reference. The catalyst of this patent consists of an aqueous suspension of a tin--noble catalytic metal colloid. Surfaces treated with such catalysts promote the generation of electrolessly formed metal deposits by the oxidation of a reducing agent in an electroless plating solution catalyzed by the catalytic colloid.
Electroless plating solutions are aqueous solutions containing both a dissolved metal and a reducing agent in solution. The presence of the dissolved metal and reducing agent together in solution results in plate out of the metal in contact with a catalytic metal tin catalyst. However, the presence of the dissolved metal and reducing agent together in solution may also result in solution instability and indiscriminate deposition of metal on the walls of containers for such plating solutions. This may necessitate interruption of the plating operation, removal of the plating solution from the tank and cleaning of tank walls and bottoms by means of an etching operation. Indiscriminate deposition may be avoided by careful control of the plating solution during use and by use of stabilizers in solution which inhibit indiscriminate deposition, but which also retard plating rate.
Attempts have been made in the past to avoid the use of an electroless plating solution by a "direct plate process" whereby a metal may be deposited directly over a treated nonconductive surface. One such process is disclosed in U.S. Pat. No. 3,099,608, incorporated herein by reference. The process disclosed in this patent involves treatment of the nonconductive surface with a tin-palladium colloid which forms an essentially nonconductive film of colloidal palladium particles over the nonconductive surface. This is the same tin-palladium colloid used as a plating catalyst for electroless metal deposition. For reasons not fully understood, it is possible to electroplate directly over the catalyzed surface of the nonconductor from an electroplating solution though deposition occurs by propagation and growth from a conductive surface. Therefore, deposition begins at the interface of a conductive surface and the catalyzed nonconductive surface. The deposit grows epitaxially along the catalyzed surface from this interface. For this reason, metal deposition onto the substrate using this process is slow. Moreover, deposit thickness is uneven with the thickest deposit occurring at the interface with the conductive surface and the thinnest deposit occurring at a point most remote from the interface.
An improvement in the process of U.S. Pat. No. 3,099,608 is described in U.K Patent No. 2,123,036 B, incorporated herein by reference. In accordance with the process described in this patent, following catalysis, a surface is electroplated from an electroplating solution containing an additive that is said to inhibit deposition of metal on the metal surface formed by plating without inhibiting deposition on the metallic sites over the nonconductive surface. In this way, there is said to be preferential deposition over the metallic sites with a concomitant increase in the overall plating rate. In accordance with the patent, the metallic sites are preferably formed in the same manner as in the aforesaid U.S. Pat. No. 3,099,608--i.e., by immersion of the nonconductive surface in a solution of a tin-palladium colloid. The additive in the electroplating solution responsible for inhibiting deposition is described as one selected from a group of dyes, surfactants, chelating agents, brighteners, and leveling agents. Many of such materials are conventional additives for electroplating solutions.
There are limitations to the above process. Both the processes of the U.S. and U.K. patents for electroplating require conductive surfaces for initiation and propagation of the electroplated metal deposit. For this reason, the processes are limited in their application to metal plating solutions of nonconductive substrates in areas in close proximity to a conductive surface. In addition, in practice, it has been found that the surface provided with metallic sites is not robust and does not stand up to those chemical treatment compositions used prior to the step of electroplating. For this reason, when the process is used for the manufacture of printed circuit boards, void formation is a significant problem resulting in rejection of circuit boards manufactured by the process.
Improvements in processes for direct electroplating of nonconductors that overcome the deficiencies in the processes of U.S. Pat. No. 3,099,608 and in U.K. Patent No. 2,123,036 are disclosed in U.S. Pat. Nos. 4,895,739; 4,919,768; 4,952,286; and 5,276,290, each incorporated herein by reference. In accordance with the processes of these patents, an electroless plating catalyst, such as that disclosed in the aforesaid U.K. patent, is treated with an aqueous solution of a chalcogen, such as a sulfur solution, to convert the catalyst surface to a chalcogenide surface. By conversion of the surface to the chalcogenide conversion coating, the coating formed is both more robust and more conductive and electroless plating catalyst does not desorb from the surface during metallization. Consequently, in accordance with the process of said patents, it is possible to form printed circuit boards using formulations that would otherwise attack the catalyst layer such as those solutions used in patterned plating processes.
The processes of the aforementioned patents provide a substantial improvement over the process of the U.K. Patent. However, it has also been found that treatment of an adsorbed catalytic metal on a substrate having both nonconductive portions and metallic portions, such as a printed circuit board substrate, with a sulfide solution results in a formation of a sulfide on metal surfaces in contact with the solution of the sulfide precursor solution. Therefore, if the process is used in the manufacture of printed circuit boards, both the catalytic metal and the copper cladding or conductors of the printed circuit board base material are converted to a tenaciously adherent sulfide. If the copper sulfide is not removed prior to electroplating, it may reduce the bond strength between the copper and a subsequently deposited metal over the copper.
An alternative method for direct electroplating of nonconductors is disclosed in U.S. Pat. No. 4,619,741, incorporated herein by reference. In accordance with the procedures of this patent, a nonconductive substrate is coated with a dispersion of carbon black and then dried. The coating is removed from surfaces where plating is undesired and the remaining portions of the substrate are plated using procedures similar to those described in the aforesaid references. There are several problems inherent in this procedure. For example, carbon black is a poor conductor of electricity and consequently, before forming the carbon black dispersion, in practice, it is believed that the carbon black particles must be treated with an organic ionomer or polymer to enhance conductivity. In addition, during processing, and prior to electroplating, the carbon black dispersion is only poorly adhered to the underlying substrate and has a tendency to flake off of the substrate prior to the plating step. This results in void formation during plating. In addition, because of the poor adherence to the substrate, subsequent to plating, there is a tendency for the metal deposit to separate from the substrate. This can lead to interconnect defects between a metallized hole and an innerlayer in multilayer printed circuit fabrication.
A more recently utilized direct plate process for metallizing the walls of hole-walls employs dispersions of graphite for the formation of a conductive coating. The use of graphite to form conductive coatings on through-hole walls is known and disclosed in U.S. Pat. No. 2,897,409 incorporated herein by reference. Current processes are disclosed, for example, in U.S. Pat. Nos. 4,619,741 and 5,389,270, each incorporated herein by reference. In accordance with the procedures set forth in these patents, a dispersion of carbon black or graphite is passed through the through-holes to form a coating of the dispersion on the holewalls. The coating is "fixed" by baking the coating to dryness to yield a conductive layer of the carbon black or graphite which is sufficiently conductive for electroplating in a conventional manner.
In the above process, because carbon and graphite are less conductive than metal and the coatings formed using dispersions of these materials are relatively porous, it is necessary to deposit a relatively thick layer of the dispersion on the substrate to provide adequate conductivity for electrolytic deposition. To increase the thickness of the coating on a substrate, a typical pretreatment procedure involves contact of a substrate with a polyelectrolyte which is a material having surfactant properties that causes the polyelectrolyte to bond to nonconducting surfaces with a tail extending outward having a charged end opposite the charge of the dispersed particles within the dispersion. This increases adsorption of the particles onto the surface of the substrate when the substrate is immersed in the dispersion thereby increasing the thickness of the deposit. A difficulty with the process is that the polyelectrolyte also adsorbs onto copper surfaces resulting in formation of a heavy deposit of the carbonaceous particles on all exposed copper surfaces. This carbonaceous coating on the copper must be removed prior to electrolytic deposition. Otherwise, the coating will interfere with the bond strength between the copper surface of the substrate and a subsequently deposited electrolytic metal deposit. In addition, excess of the carbonaceous coating must be removed from the holes passing through the substrate to prevent blockage of the same during plating. This problem is exacerbated when carbon aggregates are contained in the dispersion as a consequence of an inadequate concentration of a dispersing agent.
The conventional method for removing a carbon coating from copper surfaces involves etching of the copper to undercut the carbon coating. Following etching, the substrate is rinsed by contact with pressurized water to remove the coating from the copper surfaces and to remove aggregates from the hole interiors. These steps are laborious and often disrupt the carbonaceous coating on the nonconducting surfaces to be electrolytically plated resulting in plating defects.
Additional problems are encountered when the circuit formed is a multilayer board. In multilayer board fabrication, multiple copper clad innerlayers having circuit patterns thereon are stacked, one on top of another. When holes are drilled through the stack, the hole wall comprises a sequential stack of annular rings of non-conducting substrate and copper. The carbonaceous coating must be removed from the copper rings without disrupting the carbonaceous coating on the non-conducting surfaces. This is difficult to control because it is difficult to control the flow rate of etchant through the holes, especially when the multilayer stack has a series of holes of differing diameters. The result is that some copper innerlayers may be inadequately etched while others suffer excessive etching known in the art as etch back. Either condition may result in a defect in the metallized hole wall.